DISEÑO Y CONSTRUCCIÓN DE UN ACCESO DIRECTO A MEMORIA UTILIZANDO EL LENGUAJE VHDL Y LOS DISPOSITIVOS FPGA: UNA REVISIÓN SITEMÁTICA DE LITERATURA

Abstract

The present work is a systematic review of the literature is the result of previous work for the construction of a Direct Memory Access (DMA) using the VHDL hardware description language, the Field-programmable gate array devices (FPGA) and some algorithms for the programming of these devices, the main objective of this study is to provide an effective methodology for modeling the DMA controller ensuring proper access to data by optimizing resources for each of the relevant transactions, Another objective is to know the different architectures that exist and the configuration of the devices for a much simpler and optimal implementation, the literature research includes a framework of the Systematic Literature Review process on primary studies focused on the search of articles related to architecture, design and algorithms used to build the DMA Controller using FPGA and VHDL. The results of the review show that there is a great variety of DMA architectures, the use of these architectures depends on the type of transmission you want to make and the types of data involved in the transaction, there are also several design models in multiple programming and modeling languages, according to the DMA architecture, there is the improved architecture of the controller that greatly helps to reduce processing latency, as well as the presence of a specific architecture needed for read/write image and video